2026.09.04
International Nanodevice Technology Workshop 2026 (IWNT2026) / Hiroshima University J-PEAKS 3rd Symposium to Be Held
The “International Nanodevice Technology Workshop 2026 (IWNT2026) / Hiroshima University J-PEAKS 3rd Symposium: New Frontiers Through Interdisciplinary Research Integration” will be held on Thursday, November 12, and Friday, November 13, 2026, at the Higashi-Hiroshima City Arts and Culture Hall “Kurara.”
We will be inviting renowned researchers from Japan and abroad to give lectures on cutting-edge research, particularly in the fields of semiconductors and nanodevices. We look forward to seeing many of you there.
Event Overview
Date and Time:
November 12 (Thu) – 13 (Fri), 2026
Venue:
Higashi-Hiroshima City Arts and Culture Hall “Kurara” (Higashi-Hiroshima City, Hiroshima Prefecture)
Languages Supported
, English
Registration Fee:
Free:
*Reception Fee: 6,000 yen (General), Free (Students)
Deadline for Poster Presentation Submissions:
Friday, October 2, 2026
Registration Deadline:
Friday, October 23, 2026
For program details and registration information, please visit the IWNT2026 website.
https://www.rise.hiroshima-u.ac.jp/iwnt2026/
Invited Speakers (Tentative)
- Shinichi Takagi (Teikyo University, Japan)
- Roger Loo (IMEC, Belgium)
- Peter Bermel (Purdue University, USA)
- Christopher Bailey (Arizona State University, USA)
- Masaru Izawa (Hitachi High-Tech Corp., Japan)
- Noriaki Matsunaga (Applied Materials Japan, Japan)
- Kazuhiro Nomura (Micron Memory Japan, Japan)
- Shin-Ichiro Kuroki (RISE, Hiroshima University, Japan)
- Kenta Shigaki (Hiroshima University, Japan)
- Koichi Matsuo (Hiroshima University, Japan)
- Koji Sugano (Kobe University, Japan)
- Shigeo Asahi (Kobe University, Japan)
- Tomohisa Yoshioka (Kobe University, Japan)
- Alvin Loke (Intel, USA)
- Carlos Tokunaga (Intel, USA)
- Carl-Mikael Zetterling (KTH, Sweden)
- Alessandro Piovaccari (UT Austin, USA)
- Yoshihiro Hayashi (AIST, Japan)
Organizers, Co-organizers, and Sponsors
Organized by
Hiroshima University Research Institute For Semiconductor Engineering/ Hiroshima University
Co-organized by the Setouchi Semiconductor Consortium (
)
Sponsored by
Micron Memory Japan / Advanced Materials Research Infrastructure
As part of the initiatives related to the semiconductor field—one of J-PEAKS’s priority areas—this symposium aims to integrate interdisciplinary research and create new frontiers in research through exchanges with researchers and industry representatives both in Japan and abroad.
Contact Us
Hiroshima University Research Institute For Semiconductor Engineering
IWNT2026 Secretariat
Email: info@iwnt2026.jp
Phone: 082-424-6265
🔗 Click here for details, the program, and registration (IWNT2026 website)
